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FDS_6533_6534_004
71M6533/G/H and 71M6534/H Data Sheet
71M6533/71M6534
LCD
segments
commons
Figure 36: Connecting LCDs
4.3
Connecting I 2 C EEPROMs
the DIO pins DIO4 and DIO5 to I C pins SCL and SDA.
I 2 C EEPROMs or other I 2 C compatible devices should be connected to the DIO pins DIO4 and DIO5, as
Pull-up resistors of roughly 10 k ? to V3P3D (to ensure operation in BROWNOUT mode) should be used
for both SCL and SDA signals. The DIO_EEX[1:0] register in I/O RAM must be set to 1 in order to convert
2
10 k Ω
DIO4
DIO5
V3P3D
10 k Ω
EEPROM
SCL
SDA
Figure 37: I C EEPROM Connection
71M6533/71M6534
2
4.4
Connecting Three-Wire EEPROMs
μWire EEPROMs and other compatible devices should be connected to the DIO pins DIO4 and DIO5, as
shown in Figure 38 and described below:
?
?
?
?
?
DIO5 connects to both the DI and DO pins of the three-wire device.
The CS pin must be connected to a vacant DIO pin of the 71M6533/71M6534.
In order to prevent bus contention, a 10 k ? to resistor is used to separate the DI and DO signals.
The CS and CLK pins should be pulled down with a resistor to prevent operation of the three-wire
device on power-up, before the 71M6533/71M6534 can establish a stable signal for CS and CLK.
The DIO_EEX[1:0] field in I/O RAM must be set to 2 in order to convert the DIO pins DIO4 and DIO5
to μWire pins.
The μ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.
Rev 2
73
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